The present invention relates to a capacitor for a semiconductor configuration having a dielectric layer that is provided between two electrodes, and to a method for fabricating this dielectric layer.
DRAMs (Dynamic Random Access Memories) in silicon process technology currently primarily use storage capacitors having a dielectric layer consisting of silicon nitride (Si3N4) and/or silicon dioxide (SiO2). These NO (nitride/oxide) layers are very widespread and are in very general use as dielectrics for storage capacitors.
A certain drawback of using NO layers as dielectrics is their limited scalability. Therefore, for some time there has been a demand for other materials that can be used for the dielectric layers of capacitors, in order to achieve higher specific capacitances, i.e. capacitances per unit area, using these other materials. Examples of such materials are tantalum pentoxide (Ta2O5) and titanium dioxide (TiO2), which are distinguished by high dielectric constants. Because of these high dielectric constants, it is possible to use tantalum pentoxide and titanium dioxide to achieve reduced NO-equivalent thickness and therefore a higher specific capacitance.
Particularly in the case of DRAM fabrication, there is a need for a dielectric layer that makes it possible to achieve a specific capacitance which is significantly higher than that of NO and that can readily be integrated with the silicon process technology employed in the fabrication of DRAMs. Such materials for dielectric layers should also be distinguished by a low defect density, a high breakdown field strength (of the order of magnitude of up to 10 MV/cm and higher), lower leakage currents, high relative dielectric constants of over 20, and should have low NO-equivalent thickness.
It is accordingly an object of the invention to provide a capacitor for a semiconductor configuration and a method of producing the dielectric layer for such a capacitor, which overcome the above-mentioned disadvantages of the prior art apparatus and methods of this general type. In particular, it is an object of the invention to provide a capacitor for a semiconductor configuration, in which the dielectric layer of the capacitor makes it possible to achieve high specific capacitances and which can be integrated with silicon process technology.
With the foregoing and other objects in view there is provided, in accordance with the invention, a capacitor for a semiconductor configuration that includes two electrodes and a dielectric layer located between the two electrodes. The dielectric layer is made of an amount of a material consisting of cerium oxide, zirconium oxide, or hafnium oxide. A small amount of yttrium, relative to the amount of the material of the dielectric layer, is added to stabilize the material of the dielectric layer.
The object of the invention is achieved by the fact that the dielectric layer consists of cerium oxide (CeO2), zirconium oxide (ZrO2), or hafnium oxide (HfO2).
With the foregoing and other objects in view there is also provided, in accordance with the invention, a method for fabricating a dielectric layer of this type by sputtering from a target, by a CVD process with precursors, or by spin-on (centrifugal application). The precursors used are in particular zirconium dimethyl dibutoxide (C20H44O4Zr), Ce(thd)4, cerium dimethoxyethoxide in methoxyethanol (Ce(OCH2CH2OCH3)3) or zirconium diethylhexanoate (Zr(OOCC7H15)4).
In accordance with an added feature of the invention, if appropriate, the dielectric layer may be composed of a plurality of films which each consist of cerium oxide, zirconium oxide, or hafnium oxide. It is also possible to provide silicon nitride for one of these films. A preferred thickness for a silicon nitride film of this type in the dielectric layer is approximately 1 to 3 nm.
The cerium oxide, zirconium oxide, or hafnium oxide of the dielectric layer can be stabilized by yttrium. Even a small amount of added yttrium is sufficient. To reduce bulk defects and to improve the interfacexe2x80x94if silicon is used as an electrode materialxe2x80x94the oxides may moreover be doped with, for example, silicon or aluminum.
In accordance with an additional feature of the invention, the electrodes of the capacitor preferably consist of silicon, for example polycrystalline, doped silicon. This is possible because cerium oxide, zirconium oxide, and hafnium oxide have a high enthalpy of formation. Using silicon as an electrode material is particularly advantageous if the capacitor is used in a DRAM and deep trenches are provided for this purpose. The dielectric layer of the capacitor is applied to silicon in the trench.
Cerium oxide, zirconium oxide and hafnium oxide can be fabricated by sputtering from a target, using a CVD (Chemical Vapor Deposition) process and corresponding precursors, or using a spin-on (or centrifugal) method from a specific precursor for this type of deposition. Subsequent conditioning steps depend on the type of deposition, the type of material, i.e. cerium oxide, zirconium oxide, or hafnium oxide, the layer thickness, and the desired properties. However, the conditioning steps preferably take place in an oxygen atmosphere and at temperatures of 500 to 800xc2x0 C.
As tests have demonstrated, dielectric layers including cerium oxide, zirconium oxide, or hafnium oxide can be integrated without problems using silicon process technology normally used in the fabrication of DRAMs. Further advantages of these dielectric layers of cerium oxide, zirconium oxide, and hafnium oxide are that they have a relatively low defect density, a high breakdown field strength of 10 MV/cm and above, and a high relative dielectric constant ∈r of  greater than 20. Since, in addition, the NO-equivalent thickness of a dielectric layer of cerium oxide, zirconium oxide or hafnium oxide is low, these materials are of very great interest in particular for DRAMs of future generations.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a capacitor for semiconductor configuration, and method for fabricating a dielectric layer therefor, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.